The present invention relates to a semiconductor device with analog and digital circuits and a method of manufacturing thereof.
Increasing use of portable terminals requires light, compact, low-cost semiconductor devices. To meet their requests, semiconductor devices which have analog and digital circuits on a single chip are being developed, to replace those which had previously been mounted on separate chips.
Placing analog and digital circuits on a single chip has problem that noise produced by the digital circuit enters the analog circuit through a substrate and wells, which is causing interference with the proper operation of the analog circuit.
FIGS. 10A to 10C are sectional views roughly showing semiconductor device structures each having analog and digital circuits according to prior arts. FIGS. 9A to 9C are graphs showing simulated noise penetration levels to analog circuits from digital circuits according to the prior arts. In each graph, an abscissa represents noise frequencies produced by a digital circuit and an ordinate represents noise levels entering an analog circuit.
In FIG. 10A, the semiconductor device has a p-type substrate 510 in which an n-well 520 is formed. A digital circuit 530 and an analog circuit 540 are formed in the same n-well 520. This structure is a xe2x80x9ccommon well structure.xe2x80x9d Between the digital circuit 530 and the analog circuit 540, a guard-ring 550 is added.
The guard-ring is a high-concentration impurity diffused region to absorb noise leaking from a digital circuit, and in this example, is arranged between the digital circuit 530 and the analog circuit 540. The guard-ring may be a wall or a ring surrounding a digital circuit.
In FIG. 11A, the common well structure without noise preventive measures passes large noise from the digital circuit 530 to the analog circuit 540 irrespective of noise frequencies. If the guard-ring 550 is added, a slight improvement is observed but noise entering the analog circuit 540 is still large.
The semiconductor device of FIG. 10B has a p-type semiconductor substrate 512 in which n-wells 522 and 562 are separately formed. A digital circuit 532 is formed in the n-well 522, and an analog circuit 542 is formed in the n-well 562. More precisely, the analog circuit 542 is formed in a p-well 572 that is formed in the n-well 562. In the analog circuit formed area, the p-type substrate 512, n-well 562, and p-well 572 form a triple structure. This is a xe2x80x9ctriple well structure.xe2x80x9d A guard-ring 552 is formed, if needed, in the n-well 522 between the digital circuit 532 and the analog circuit 542.
The semiconductor substrate 512 is usually a low resistance substrate having a specific resistance of, for example, 1 xcexa9 cm because such a substrate is easy to make and handle.
In FIG. 11B, the triple well structure without a guard-ring realizes a noise level of lower than xe2x88x9260 dB for noise frequencies lower than 100 M (108) Hz. If the guard-ring 552 is added, the triple well structure further suppresses noise penetration. For noise frequencies over 1 G (109) Hz, however, the triple well structure with or without the guard-ring 552 is ineffective and passes unignorable noise.
The semiconductor device of FIG. 10C has an SOI substrate. The SOI substrate has an oxide layer 516 sandwiched between an upper semiconductor layer and a lower semiconductor layer 514. The upper semiconductor layer has n-wells 524 and 564 and a p-type semiconductor region 574 between the n-wells 524 and 564. In the n-well 524, a digital circuit 534 is formed, and in the n-well 564, an analog circuit 544 is formed.
In FIG. 11C, the SOI substrate structure with a guard-ring 554 shows a remarkable effect of absorbing noise, to prevent the penetration of noise to the analog circuit 544.
Noise paths to the analog circuit 542 in the triple well structure of FIG. 10B will be explained. Some noise emanates from the side of the digital circuit 532, passes through the surface of the n-well 522, and enters the analog circuit 542. Some noise emanates from the bottom of the digital circuit 532, passes through the semiconductor substrate 512 under the digital circuit 532, and reaches the analog circuit 542. The guard-ring 552 effectively absorbs the sideward noise but is useless to absorb the bottom passing noise. On the other hand, the SOI substrate structure of FIG. 10C has the SiO2 layer 516 under the n-well 524 to block the bottom noise from the digital circuit 534. As a result, a major noise path to the analog circuit 544 laterally extends through the surfaces of the wells. As a result, the guard-ring 554 is effective to absorb the laterally passing noise.
In this way, the combination of an SOI substrate and a guard-ring is most effective so far among the conventional structures to prevent noise penetration from a digital circuit to an analog circuit. Still, there is a need for a structure that is capable of preventing the penetration of high-frequency noise to an analog circuit.
The conventional SOI substrate structure has some problems. For example, SOI substrates are expensive compared with standard semiconductor substrates. Further, the SOI substrate involves low heat conductivity at the intermediate oxide layer 516, and therefore, is unable to effectively radiate heat during the operation of elements. In addition, the SOI substrate is structurally unable to release hot carriers if produced, thereby destabilizing transistor properties.
An object of the present invention is to provide a semiconductor device with digital and analog circuits, having a new structure employing an SOI substrate or a substrate comparable to an SOI substrate, as well as a method of manufacturing such a semiconductor device.
In order to accomplish the objects, a first aspect of the present invention provides a semiconductor device with digital and analog circuits formed in a high-resistance semiconductor substrate of a first conductivity type. First and second wells of a second conductivity type are independently formed at a surface of the semiconductor substrate. The digital circuit is formed at a surface of the first well, and the analog circuit is formed at a surface of the second well. The specific resistance of the semiconductor substrate is at least 1000 times as large as the specific resistance of the first well.
A second aspect of the present invention provides a semiconductor device with digital and analog circuits formed in a substrate having an upper semiconductor layer, a lower semiconductor layer, and an insulating layer sandwiched between the upper and lower semiconductor layers. First and second wells of a second conductivity type independently are formed in the upper semiconductor layer with a semiconductor region of a first conductivity type being interposed between the first and second wells. The digital circuit is formed at a surface of the first well, the analog circuit is formed at a surface of the second well, and a conductive guard-ring is formed in a surface of an area that is between the digital circuit and the second well or between the first well and the second well. A distance between a bottom of the guard-ring and a bottom of the first well is 0.8 xcexcm or shorter.